Performance Metrics in Computer Architecture

Performance metrics in computer architecture – The computer performance has improved over time. Generally, performance is a very wide term and describes how quickly a given system can execute a program or programs.

System that execute programs in less time are said to have higher performance. In finding the hardware requirements for the processor, the performance is one of key factor to consider, along with cost, size, security, reliability and power consumption.

It is very difficult to compare different processors in accordance to the execution speed. The execution speed of an application depends not just on the speed of processor but on the instruction set, choice of implementation language, efficiency of compiler and skill of programming.

Measurement of execution time is also impractical since it is not possible to test each and every program on the computer. Therefore, computer architects have came up with a variety of metrics to describe computer performance some of them are:

Performance metrics of computer architecture

Millions of instructions per second (MIPS)
Cycles per instruction (CPI)
Instructions executed per cycle (IPC)
Speed up

Millions of Instructions Per Second (MIPS)

This is common measure of performance for a processor which is defined as the rate at which instructions are executed. This is expressed in millions of instructions per second. This is calculated by dividing the number of instructions executed in running a program by the time required to run the program.

Mathematically,

MIPS = I_C / T x 10⁶

where I_c is total instruction count and T is the total execution time in seconds.

The MIPS performance parameter is generally not preferred now a days because it does not account for the fact that different systems often require different numbers of instructions to implement a given program.

Cycles Per Instruction (CPI)

A processor is driven by a clock with a constant frequency. Therefore, computer performance can be defined as the number of clock cycles required to execute the instruction. This is known as cycles per instruction (CPI).

The cycles per instruction of a given program on a given system is calculated by dividing the number of clock cycles required to execute the program by the number of instructions executed in running the program.

If all the instructions required the same number of clock cycles, then CPI would be a constant value for that processor. However, on any given processor, the number of clock cycles required varies for different types of instructions such as load, store, branch and so on Mathematically for a given program CPI is defined as

CPI = Total number of cycles / Total number of instenctions

Instruction Executed Per Cycle (IPC)

The instruction executed per cycle (IPC) is another form of CPL. IPC is calculated by dividing the number of instructions executed in running a program by the number of clock cycles required to execute the program.

Mathematically, for given program

IPC = Total number of Instenctions / Total number of cycles

The instruction executed per cycle (IPC) is the reciprocal of cycles per instruction (CPI). Both of the method give the same information, and the choice of which are to use is generally made based on which of the values is greater than number 1.

Most of the computer architecture research is done in the field of simulation. These simulations are generally unable to calculate the cycle time of the systems that they simulate. so CPI or/and IPC are often the best available estimate of performance.

Note: The high values of IPC indicate that the given program took fewer cyclox to be executed while high values of CPI indicate that more cycles are required for execution. Thus a high IPC indicates good performance, while a high CPI indicates poor performance

Speed-up

Speed up is defined as the ratio of execution times before and after a change is made, Therefore, the term speed up for computer architecture describes how the performance of architecture changes as different improvements are made to the architecture.

Mathematically,

Speedup = Execution time before / Execution time after

Speedup = Performance after / Performance before

Let a feature of the system is used, during execution a fraction of the time t, before improvement, and that the speed up of that feature after improvement is SU_f. Then the overall speedup of the system is given as

Speedup = 1 / (1-f)+ (f/ SU_f)