Instruction Types and their Classification | Computer Architecture

Instruction Types in Computer Architecture – The length of an instruction affects various factors like memory size, memory organization, bus architecture, CPU complexity, and speed of the computer system. There is a trade-off between the desire of powerful instruction set and the need to minimize the memory requirement of instructions.

The instruction set can be classified on the basis of the available number of addresses in an instruction. There can be four types of instructions in an instruction set.

Instruction Types in Computer Architecture

1. Three-address instruction
2. Two-address instruction
3. One-address instruction
4. Zero address instruction

Three-address instructions

Three-address instructions have 3-addresses in the addressfield of the instruction. It can use each address field to specify either a processor register or a memory operand. The major advantage of this instruction format is that it reduces the program to a great extent. Examples of three-address instructions are as follows

ADD  A,B,C;          M[A] <- M[B] + M[C]
MUL  R1,D,E;         R1 <- M[D] * M[E]

Two-address instruction

Two address instruction are the most common instructions in computer systems. It has two addresses in the address fields of the instruction. In this type of instruction, the first address in the instruction is assumed to be both the source and the destination where the result of the operation is transferred.

Examples of two-address instructions are as follows:

MOV  R1, X;       R1 <- M[X]
ADD  R2, Y;       R2 <- R2 + M[Y]

One address instructions

One address instructions have only one address in the address field of the instruction. The accumulator is assumed as implied address. In this type of instruction, the operations are performed in the one address given and the accumulator. Examples of one-address instructions are as follows

LOAD   B     AC <- M[B]
ADD    C     AC <- AC + M[C]

Zero address instructions

Zero address instructions do not have an address field in the instruction. These instructions use stack operations to perform various tasks. To evaluate arithmetic expressions in a computer, it is necessary to convert the expression into reverse Polish notation. Examples of zero address instructions are following

PUSH A     M[SP+1] <- A
ADD;       M[SP+1] <- (A+B)

Example: Explain the influence of the number of addresses on a computer program to evaluate the following arithmetic statement.

X=(A*B) + (C*D)

Use the symbols ADD, SUB, MUL, and DIV for the four arithmetic operations; MOV for the transfer operation; and LOAD and STORE for transfers to and from memory and the AC register. Here, A, B, C, and D are memory addresses where operands are stored. Result must be stored in memory at address X.

Solution: (i) Three-address instruction program

The program that evaluates the given function is given below.

Instruction Opcode field	Instruction Address field	Register Transfer Language
MUL	R1, A, B	R1 ← M[A] * M[B]
MUL	R2, C, D	R2 ← M[C] * M[D]
ADD	X, R1, R2	X ← R1 + R2

(ii) Two-address instruction program

Instruction Opcode field	Instruction Address field	Register Transfer Language
MOV	R1, A	R1 ← M[A]
MUL	R1, B	R1 ← R1 * M[B]
MOV	R2, C	R2 ← M[C]
MUL	R1, D	R2 ← R2 * M[D]
ADD	R1, R2	R1 ← R1 * R2
MOV	X, R1	M[X] ← R1

(iii) One address instruction program

Instruction Opcode field	Instruction Address field	Register Transfer Language
LOAD	A	AC ← M[A]
MUL	B	AC ← AC * M[B]
STORE	T	M[T] ← AC
LOAD	C	AC ← M[C]
MUL	D	AC ← AC * M[D]
ADD	T	AC ← AC + M[T]
STORE	X	M[X] ← AC

(iv) Zero address instruction program

Instruction	Register Transfer Language
PUSH A	SP ← SP + 1, M[SP] ← A
PUSH B	SP ← SP + 1, M[SP] ← B
MUL	SP ← SP + 1, M[SP] ← A * B
PUSH C	SP ← SP + 1, M[SP] ← C
PUSH D	SP ← SP + 1, M[SP] ← D
MUL	SP ← SP + 1, M[SP] ← C * D
ADD	A * B + C * D
POP X	M[X] ← M[SP], SP ← SP-1

The above four cases of programs to evaluate similar functions (X=A*B+C*D) indicate that as the number of addresses in the address field of instruction increases, the size of the program reduces.

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