Program Control in Computer Architecture

Program control in computer architecture – Normal instructions are stored in successive memory locations, and the processor sequentially executes them. Each time, one instruction is fetched from memory, the program counter is incremented by one to indicate the address of the next instruction, and then the instruction is executed.

However, when some of the instructions are executed, they may change the address in the program counter. This results in altering the flow of control. Now the processor fetches the instruction from new loaded address rather than the sequential address. These types of instructions are named as program control instructions.

Program Control in Computer Architecture

Program control instructions specify conditions for altering the contents of the program counter, whereas data transfer and manipulation instructions simply specify conditions for data processing operations. There are various program control instructions, a few of which are shown in the table below.

Name	Mnemonic	Function
Jump	JMP	Program control jumps to the given address may be outside the main program
Branch	BR	similar to jump, but the address is given by a symbolic name.
Skip	SKP	Skip the next instruction if the condition is met.
Call	CALL	Jump to the address of the subroutine after saving the returning address.
Return	RET	Used with the call instruction to return to the main program.

These instructions can be conditional and unconditional. The conditional program control instructions indicate that the flow of control will be changed if the specified condition is met. otherwise sequential execution will be continued. Whereas the unconditional program control instructions do not check any condition, and program control jumps to the new specified address.

In addition to the most common program control instructions, as given in the above table, there are two more instructions. These instructions are compare (CMP) and Test (TST). These two do not change the program sequence directly but affect the status bits, which are used by other instructions. Status bits are stored in the status register.

The following figure shows the block diagram of an 8-bit ALU with a 4-bit status register. The bits of the status register are set or reset according to the result in the ALU.

The bits of the status registers are affected by the result of an operation performed in the 8-bit ALU on two 8-bit inputs, A and B.

1. The zero bit (Z) is set if the output of ALU (F₀-F₇,) contains all 0’s, otherwise; it is reset.
2. The sign bit (S) is a copy of the most significant bit of the result (F₇).
3. The carry bit (C) is set if the end carry C₈ is 1, otherwise, it is reset.
4. The overflow bit (v) is set if the EX-OR of the last two carries is equal to 1, and cleared otherwise.

There are two common examples of alteration of program control that are used in computer systems.

1. Subroutine
2. Interrupt

Subroutine

A subroutine is a subprogram (group of instructions) written separately from the main program to perform a particular task. The subroutine may be called repeatedly in the main program. A single subroutine may be used many times in a main program, and many programs may use the same subroutine many times.

As the subroutine can be called by many of the programs, it should be written in such a way that it does not make any desired change in the status (registers and flags) of the main program.

Parameter Passing Techniques

Subroutines are used to process data or address variables from the main program. Therefore, it is required that some data or an address be passed from the main program to the subroutine. This is known as parameter passing. There are four ways to pass the parameters to and from the subroutine

1. Using registers.
2. Using general memory.
3. Using pointers,
4. Using a stack.

Using Registers: The processor registers are accessible to the main program as well as in a subroutine. It means the data to be passed is stored in registers, and these registers are accessed in the subroutine to process the data. In this technique, the registers are loaded with the appropriate values to be passed and then the subroutine is called.

Using General Memory: This technique is used when a large number of parameters have to be passed to and from a subroutine. This memory may be a part of general memory. In this technique, the main program loads the pre-defined memory locations with appropriate values before calling the subroutine. Subroutine can process these values by referring to these predefined memory locations. The subroutine program stores the results in memory locations before executing the return instruction. The main program accesses results from these memory locations for further processing.

Using Pointers: In the passing parameter technique using pointers, the passing parameters are stored in consecutive memory locations. Then the starting address of the parameter list is stored in an address register or pre-defined memory locations. The consecutive memory locations can be accessed by the subroutine.

Using Stack: The stack can also be used to pass the parameter to and from a subroutine. In the parameter passing technique using a stack, the parameters are first pushed into the stack, and then the subroutine is called. The subroutine can access the data on the stack directly. Whenever the stack is used to pass parameters, it is very important to keep track of what is pushed on the stack and where the stack pointer points at all times in the program.

Subroutine Handling

Various instructions are used with a subroutine. Some common instructions are call subroutine, jump to subroutine, branch to subroutine, etc. A subroutine call instruction consists of an opcode together with the starting address of the subroutine. Whenever the program control returns from a subroutine to the main program, two operations are performed:

1. The address of the next instruction (available in the program counter) is stored in temporary memory. This helps to return back to the main program.
2. Transfers the address from the instruction to the program counter.

Now the program control is transferred from the main program to the starting address of the subroutine, which is loaded into the program counter. The last instruction of a subroutine is commonly a return from the subroutine. This instruction retrieves the returning address from the temporary memory and load into the program counter. This results in a transfer of program control to the instruction whose address was originally stored in a temporary location.

If one subroutine calls another subroutine, the new return address is also pushed into the stack. The second subroutine is also allowed to call another subroutine. In a similar manner third subroutine may call the next subroutine. The program control returns back in the reverse order. The figure below shows the program execution for three subroutines that are main program.

When a subroutine calls itself, it is known as a recursive subroutine. This type of subroutines are used to work with complex data structures. Such a type of subroutine makes a call to itself until the condition is satisfied; otherwise, it returns to the main program.

Subroutine Cycle

A subroutine call is implemented with the following micro operations

SP ← SP+1                           Increment stack pointer
M[SP] ← PC                          Push contents of PC into stack
PC ← Address from instruction       Transfer control to the subroutine

The instruction that returns from the end of the subroutine is implemented by the micro operations:

PC ← M[SP]       Restore the return address
SP ← SP-1        Decrement stack pointer.

Interrupt

In general, the processor executes the instructions in a sequence to complete the specific task. Sometimes it is needed to break the sequence of the program on demand of an external device. This can be achieved by an interrupt signal.

An interrupt is defined as a signal that is generated by a peripheral to break the sequence of the main program, and program execution jumps to the pre-specified memory location. A subroutine is written at the predefined memory location to complete the task provided for the peripheral.

This subroutine is named as Interrupt Service Routine (ISK), ISR is similar to subroutine with the difference that subroutine is called by instruction and this is known to the programmer that at what time the subroutine is to be called, but ISR is called in response of interrupt signal and thus is not known by the programmer at what time it is to be called. The program control returns back to the original program after the ISR is executed.

Types of Interrupts

The interrupt signal is generated by a peripheral. The microprocessor can respond to or discard the request as per the priority between the current operation and the requesting operation. There are four major sources of interrupt signals that cause a break in the normal execution of a program.

1. Internal Interrupts
2. External Interrupts
3. Software Interrupts
4. Hardware Interrupts.

Internal Interrupts: These types of interrupts are generated from illegal or erroneous use of an instruction or data. These interrupts are also known as traps. These interrupts occur as a result of premature termination of the instruction execution.

The interrupt service routine (ISR) processes the internal interrupts for corrective measures to be taken. Some common examples of these interrupts are divided by zero, invalid operation code, register overflow, stack overflow, and protection violation.

External Interrupts: An external interrupt is a common type of interrupt. The interrupt signals that are generated by peripherals, such as any input/output device, timer, switch, or any other external source, come under this category.

An input/output device may request to perform a task while the processor is executing another program. Another example of an external interrupt is a power failure interrupt. It may have a service routine program that transfers the complete state of the processor into a non-destructive memory in a few milliseconds before a power failure takes place.

Software Interrupts: A software interrupt is initiated by executing an instruction. However, the previous two types of interrupts are initiated by a signal that occurs in the processor hardware. A software interrupt may be considered a special type of call instruction. This call behaves as an interrupt call rather than a subroutine call. The most common use of this interrupt is associated with the supervisor call (SVC) instruction, whereby the CPU changes the state from user mode to supervisor mode.

A software interrupt is initiated by executing an instruction of type INTn in a program, where n refers to the starting address of a procedure. In the DOS (Disk Operating System) environment, all service routines of the operating system can be invoked by a common interrupt instruction (INT 33).

Hardware Interrupts: These types of interrupts are associated with the system to handle machine errors. The processor generally has a register that stores the hardware errors. For example, parity errors in any system are continuously monitored by the error-checking hardware. If there is any error in the execution of the input/output operation, it will be registered in 10 status register. Hardware interrupts and the associated interrupt service routine (ISR) enable the system to effectively handle machine errors. Therefore, this type of interrupts are also known as a machine check interrupt.

Interrupt Handling

The procedure for interrupt handling is very similar to the execution of a subroutine call instruction. Whenever an interrupt occurs, the processor state is pushed into the stack, and the starting address of the ISR is transferred to the program counter. The starting address of the ISR is determined by the hardware rather than the address field of an instruction.

Let the processor be busy in the execution of a normal program, and an interrupt signal occurs. The processor does not respond to the interrupt until the end of the current instruction execution. Once the current instruction execution is completed, the processor stores the contents of the Program Counter (PC) and the Program Status Word (PSW) into the stack.

Now, interrupt control hardware recognizes the interrupt and its ISR memory location. The new address for the particular interrupt is then transferred to the PC, and a new PSW is loaded into the status register. Now, program execution jumps to the new specified address, where the interrupt service routine is written.

The last instruction in the service routine is a return from interrupt instruction. When this instruction is executed, the stack is popped to retrieve the old PSW and return address. The return address is transferred to the program counter, and PSW is loaded into the status register. In this way processor restores its previous state, and the original program is executed.

The basic flow of interrupt handling is shown in the figure below. Initially, the processor is executing the main program, and when an interrupt occurs, it jumps to the interrupt service routine (ISR). After execution of ISR, the program control returns back to the main program.

If more than one peripherals are connected to a system, any one of them may demand service at any time. The one way to provide services to all peripherals is for the processor to check all the peripherals one by one. If any peripheral wants the service it will provide; otherwise, check for the next peripheral.

This is known as a polling check. The other way allows the processor to execute the main program. The peripheral which wants the service, generates a signal to break the execution of the main program. In response to this processor provides the service to that peripheral. This is known as an interrupt check.

Interrupt Cycle

Once the interrupt signal is accepted by the professor, it follows the following micro-operations.

SP ← SP+1        Increment stack pointer
M[SP] ← PC       Push contents of PC into stack
SP ← SP+1        Increment stack pointer
M[SP] ← PSW      Push contents of PSW into stack
PSW ← New PSW    Load new PSW into status register
PC ← ISR address Transfer ISR address into PC.

Now the processor control jumps to the ISR address and completes the execution of the ISR. The last instruction of the ISR is a return from interrupt instruction. When this instruction is executed, the stack is popped to retrieve the old PSW and return address through the following micro operations.

PSW ← M[SP]       Restore old PSW into status register
SP ← SP-1         Decrement stack pointer
PC ← M[SP]        Restore return address into PC
SP ← SP-1         Decrement stack pointer

Thus, the processor state is restored, and the original program can continue executing.

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