Input Output Interface in Computer Architecture

Input Output Interface in Computer Architecture – Any application of a processor-based system requires the transfer of data from external circuitry to the processor and from the processor to the external circuitry. The user can give information to the processor using an input device and check the result or output information from the processor with the help of an output device.

The transfer of the data between the input and processor, and the processor and output device, is called input/output data transfer or I/O data transfer. This data transfer is done with the help of input/output ports.

An input port is used to read data from input devices. The simplest form of the input port is a buffer. The input device is connected to the processor through the buffer, as shown in the figure below. This input port is a tri-state buffer, and its output is available only when the enable signal is active. The enable signal is activated by the processor to read data from the input device.

The output port is used to send the data to the output device from the processor. The simplest form of output port is a latch. The output device is connected to the processor through the output port, as shown in the figure below. When the processor wants to send data to the output device, it puts the data on the data bus and activates the enable input of the latch. This latches the data from the data bus to the output of the latch and makes it available for the output device.

Input Output Interface

Input and output devices are the communication channels of the microprocessor to the external world. Input/output devices are connected to the microprocessor through input/output ports. There are two ways to transfer the data: 

1. Parallel I/O mode and
2. Serial I/O mode 

In parallel I/O mode, a group of bits is transferred from the processor to the external world and vice versa. Whereas in serial I/O mode, óne bit is transferred using one line only.

Input Output Classification

Input-output interfacing can be classified into CPU-initiated I/O transfer and device initiated 1/O transfer. CPU-initiated I/O transfer can again be categorized as conditional and unconditional 

During an unconditional CPU-initiated I/O transfer, the input/output devices are always ready to evertake data wherever the processor wants to do so. Whereas during a conditional CPU-initiated/O transfer, the input/output device communicates only if it is free. Interrupts and DMA (Direct Memory Access) operations are device-initiated. Under these categories, the input/output devices request from the processor, and if the processor is free, then it responds to these requests. The figure below shows the classification of I/O interfaces.

Interfacing Techniques

In parallel I/O mode, devices can be interfaced with the processor using two techniques:

1. Peripheral-mapped I/O
2. Memory-mapped I/O

The basic process for data transfer in both techniques is similar. When a data transfer instruction is executed for an I/O device, the processor places the appropriate address on the interfacing device and transfers the data.

Peripheral Mapped I/O

In peripheral mapping, the address assigned to memory locations can also be assigned to I/O devices. Since the same address may be assigned to a memory location or an I/O device, the processor must issue a control signal to differentiate whether the address on the address bus is for a memory location or for an I/O device. The control lines I/O read and I/O write are enabled during an I/O transfer. The memory read and memory write control lines are enabled during a memory transfer operation. This configuration isolates all I/O addresses from all addresses assigned to memory and is also known as the isolated I/O mapping.

The figure below shows an example of peripheral mapped I/O with a processor having 16 bit wide address bus for addressing memories and I/O devices, and 8 bit wide data bus common for both memories and I/O devices. In this, out of 16 address lines, 8 lines are used for memory locations and 8 lines for I/O devices. 

Memory Mapped I/O

In memory-mapped I/O, there is only one address space. In this interfacing, a memory location and an I/O device can not have the same address. There are no specific input or output instructions. The processor transfers the data residing in I/O devices with the same instructions that are used to transfer the data residing in memory locations. The advantage of this is that the load and store instructions used for reading and writing from memory can be used to input and output data from I/O devices.

An example of a processor with a 16-bit wide address bus and an 8-bit wide data bus with memory-mapped I/O is shown in the figure below. In this, some addresses are assigned to memory locations and some addresses to I/O devices. Suppose the memory locations are assigned the address from 7000H to 73FFH. Once the address is assigned to memory locations, any one of these addresses can not be assigned to any I/O device. The addresses for I/O devices are different from the addresses that have been assigned to memory locations. Hence, an I/O device can also be treated as a memory location.

Interfacing Circuit

The input output interface circuit provides a method for transferring information or data between memory and I/O devices. Interfacing circuits allow I/O devices of widely different characteristics to be connected to a standard bus with a minimum of special-purpose hardware or software.

The simplest form of interface circuit is a one-word, addressable register that can serve as an I/O port. Most of the microprocessor families contain various general-purpose and special-purpose I/O interfacing circuits. These circuits can be programmed in accordance with the characteristics of different VO devices, therefore known as programmable circuits. The figure below shows the I/O interfacing circuit, which interfaces two I/O devices with a processor.

Input Output Commands

The input-output bus system of a computer system consists of data, address, and control lines. The figure below shows a general communication link between the processor and several input/output devices through buses and interface circuits.

The above figure shows a system bus that consists of data, address, and control lines. The system bus is connected to all independent interface circuits of each I/O device. The processor places the device address in the address lines to which it wants to communicate. Each interface circuit contains an address decoder that monitors the address lines. When the address decoder detects its own address, it activates the path between the system bus and the I/O device. The remaining I/O devices are disabled by their respective interface circuit. The communication between the processor and I/O devices is controlled by the 1/0 commands. 1/0 commands are issued by the processor itself. There are basically four types of I/O commands that an interface circuit may receive.

Control Command – This is issued to activate the I/O device and provides the instruction to operate. The control command depends on the particular I/O device. For example, the control command for a printer would be different than the command issued for a monitor; however, both are output devices. Each I/O device has its own specific set of control commands and responds to those only. It depends on its mode of operation.

Status Command – This is used to test various status conditions in the interface circuit and the I/O device. This type of command may be used to synchronize the slower devices with a faster processor. For example, the processor will send the data to the printer if it is ready to accept more data to print. It is checked with the help of the status command. It is notified to the processor by setting the status of the I/O device into the corresponding status bit of its status register. The processor reads the statuş register at some specific time intervals.

Data Output Command – This command causes the interface to respond by transferring data into the bus from one of its registers. Consider an example with a printer unit. The printer is activated through the control command. 

which is issued by the processor. Now the processor checks the status of the printer using the status command. If it is ruady then the processor issues a data output command. The interface circuit responds to the address and command. Now it transfers the information from the data lines of the system bus to its buffer register. The interface circuit then communicates with the printer and sends the data to be printed by the printer 

Data Input Command – This is the opposite of the data output command. In this, the interface first receives the data from the input device and places that data into its buffer register. After that, the interface circuit sets the status bits to inform the processor that data is ready. The processor checks the status by issuing the status command. If the data is ready, then the processor issues the data input command. The interface circuit, now, places the data on the data lines where they are accepted by the processor.