Fetch Decode Execute Instruction Cycle | Computer Architecture

Fetch Decode Execute Instruction Cycle – In a computer Instructions are processed under the direction of the control unit in a step-by-step manner. Each step is referred to as a phase.

There are four fundamental phases of the instruction cycle:

1. Fetch instruction
2. Decode instruction
3. Read the Effective Address
4. Execute instruction

Fetch the instruction: The next instruction is fetched from the memory address that is currently stored in the Program Counter (PC), and stored in the Instruction register (IR). At the end of the fetch operation, the PC points to the next instruction that will be read at the next cycle.

Decode the instruction: The decoder interprets the instruction. During this cycle, the instruction inside the IR (instruction register) gets decoded.

Read the Effective Address: If the instruction has an indirect address, the effective address is read from the memory. Otherwise, operands are directly read in case of an immediate perand instruction.

Execute instruction: The Control Unit of the CPU passes the decoded information as a sequence of control signals to the relevant function units of the CPU to perform the actions required by the instruction, such as reading values from registers. passing them to the ALU to perform mathematical or logic functions on them. and writing the result back to a register. If the ALU is involved. it sends a condition signal back to the CU.

The cycle is then repeated by fetching the next instruction. Thus, in this way, the instruction cycle is repeated continuously.