Asynchronous Data Transfer in Computer Architecture

Asynchronous Data Transfer in Computer Architecture – We know that the internal operations in individual units of a digital system are synchronized by means of a clock pulse, which means a clock pulse is given to all registers within a unit, and all data transfer among internal registers occurs simultaneously during the occurrence of a clock pulse. Now, suppose any two units of a digital system are designed independently, such as the CPU and the I/O interface.

What is Asynchronous Data Transfer?

And if the registers in the interface(I/O interface) share a common clock with CPU registers, then transfer between the two units is said to be synchronous. But in most cases, the internal timing in each unit is independent from the others in such a way that each uses its own private clock for its internal registers. In that case, the two units are said to be asynchronous to each other, and if data transfer occurs between them, this data transfer is said to be Asynchronous Data Transfer.

But, the Asynchronous Data Transfer between two independent units requires that control signals be transmitted between the communicating units so that the time at which they send data can be indicated.

This asynchronous way of data transfer can be achieved by two methods:

1. Strobe Control
2. Handshaking

Strobe Control Method

The Strobe Control method of asynchronous data transfer employs a single control line to time each transfer. This control line is also known as a strobe, and it may be achieved either by source or destination, depending on which initiate transfer.

Source-initiated strobe for data transfer: The block diagram and timing diagram of the strobe initiated by the source unit are shown in the above figure. In the block diagram, we see that the strobe is initiated by the source, and as shown in the timing diagram, the source unit first places the data on the data bus. After a brief delay to ensure that the data settles to a steady value, the source activates a strobe pulse. The information on the data bus and strobe control signal remains in the active state for a sufficient period of time to allow the destination unit to receive the data.

Actually, the destination unit uses a falling edge of strobe control to transfer the contents of the data bus to one of its internal registers. The source removes the data from the data bus after it disables its strobe pulse. New valid data will be available only after the strobe is enabled again.

Data Transfer Initiated by Destination Unit: In the block diagram, we see that the strobe is initiated by the destination, and as shown in the timing diagram, the destination unit first activates the strobe pulse, informing the source to provide the data. The source unit responds by placing the requested binary information on the data bus. The data must be valid and remain in the bus long enough for the destination unit to accept it. The falling edge of the strobe pulse can be used again to trigger a destination register. The destination unit then disables the strobe. And the source removes the data from the data bus after a predetermined time interval.

Disadvantage of Strobe Signal: The disadvantage of the strobe method is that the source unit initiates the transfer and has no way of knowing whether the destination unit has actually received the data item that was placed in the bus. Similarly, a destination unit that initiates the transfer has no way of knowing whether the source unit has actually placed the data on the bus. The Handshaking method solves this problem.

Handshaking Method

The disadvantage of the strobe method is that the source unit that initiates the transfer has no way of knowing whether the destination has actually received the data that was placed in the bus. Similarly, a destination unit that initiates the transfer has no way of knowing whether the source unit has actually placed data on the bus. This problem can be solved by handshaking method. The handshaking method introduces a second control signal line that provides a reply to the unit that initiates the transfer.

Principle of Handshaking: The basic principle of the two-wire handshaking method of data transfer is as follows: One control line is in the same direction as the data flows in the bus from the source to the destination. It is used by the source unit to inform the destination unit whether there is valid data in the bus. The other control line is in the opposite direction from the destination to the source. It is used by the destination unit to inform the source whether it can accept the data. The sequence of control during the transfer depends on the unit that initiates the transfer.

Source Initiated Transfer using Handshaking: The sequence of events shows four possible states that the system can be in at any given time. The source unit initiates the transfer by placing the data on the bus and enabling its data valid signal. The data accepted signal is activated by the destination unit after it accepts the data from the bus. The source unit then disables its data accepted signal, and the system goes into its initial state.

Destination Initiated Transfer Using Handshaking: The name of the signal generated by the destination unit has been changed to ready for data to reflect its new meaning. This source unit, in this case, does not place data on the bus until after it receives the ready for data signal from the destination unit. From there on, the handshaking procedure follows the same pattern as in the source-initiated case. The only difference between the Source Initiated and the Destination Initiated transfer is in their choice of Initial state.

Advantage of the Handshaking method:

1. The Handshaking scheme provides a degree of flexibility and reliability because the successful completion of data transfer relies on active participation by both units.
2. If any one unit is faulty, the data transfer will not be completed. Such an error can be detected by means of a Timeout mechanism, which provides an alarm if the data is not completed within a time.

Asynchronous Serial Transmission:

The transfer of data between two units is serial or parallel. In parallel data transmission, n bits in the message must be transmitted through n separate conductor paths. In serial transmission, each bit in the message is sent in sequence one at a time.

Parallel transmission is faster, but it requires many wires. It is used for short distances and where speed is important. Serial transmission is slower but is less expensive. In Asynchronous serial transfer, each bit of the message is sent in sequence at a time, and binary information is transferred only when it is available. When there is no information to be transferred. The line remains idle.

In this technique, each character consists of three points:

1. Start bit
2. Character bit
3. Stop bit

Start Bit -The first bit, called the start bit, is always zero and used to indicate the beginning character.

Stop Bit – The last bit, called the stop bit, is always one and used to indicate the end of characters. The stop bit is always in the 1-state and frames the end of the characters to signify the idle or wait state.

Character Bit – Bits in between the start bit and the stop bit are known as character bits. The character bits always follow the start bit.

Serial Transmission of Asynchronous is done by two ways:

1. Asynchronous Communication Interface
2. First In First Out Buffer

Asynchronous Communication Interface: It works as both a receiver and a transmitter. Its operation is initialized by the CPU by sending a byte to the control register. The transmitter register accepts a data byte from the CPU through the data bus and transferred to a shift register for serial transmission. The receive portion receives information into another shift register, and when a complete data byte is received, it is transferred to the receiver register. The CPU can select the receiver register to read the byte through the data bus. Data in the status register is used for input and output flags. The block diagram of the asynchronous communication interface is shown below.

First In First Out Buffer (FIFO): A First In First Out (FIFO) Buffer is a memory unit that stores information in such a manner that the first item is the item first out. A FIFO buffer comes with separate input and output terminals. The important feature of this buffer is that it can input data and output data at two different rates.

When placed between two units, the FIFO can accept data from the source unit at one rate, the rate of transfer, and deliver the data to the destination unit at another rate. If the source is faster than the destination, the FIFO is useful for source data arrive in bursts that fill out the buffer. FIFO is useful in some applications when data is transferred asynchronously.