Micro Program Examples in Computer Architecture

Micro Program Examples in Computer Architecture – The configuration of a digital computer and its microprogrammed control unit is established; the designer’s task is to generate the microcode for the control memory. This code generation is called microprogramming and is a process of conventional machine language programming.

Computer Hardware Configuration

Here is the block diagram of the computer hardware configuration in the figure below.

It consists of two memory units: A main memory which stores the instructions and data, and a control memory which stores the microprogram.

6 registers are used: 4 processor units register namely: {AC (accumulator), PC(Program Counter), AR(Address Register), DR(Data Register)}

2 Control unit register, namely: {CAR (Control Address Register), SBR(Subroutine Register)}

The transfer of information among the registers in the processor is done through multiplexers rather than a common bus. DR can receive information from AC, PC, and memory. AR can receive information from PC or DR. PC can receive information only from AR.

The arithmetic, logic, and shift unit performs micro-operations with data from AC and DR and places the result in AC. Input data written to memory comes from DR, and data read from memory can go only to DR.

Microinstruction Format

The microinstruction format for the control memory is shown in the figure below.

F1 (3 bit)

F2 (3 bit)

F3 (3 bit)

CD (2 bit)

BR (2 bit)

AD (7 bit)

F1, F2, F3: Micro-operation fields
CD: Condition for branching
BR: Branch field
AD: Address field

The 20 bits of the microinstruction are divided into four functional parts as follows:

1. The three fields F1, F2, and F3 specify microoperations for the computer. The microoperations are subdivided into three fields of three bits each. The three bits in each field are encoded to specify seven distinct microoperations. This gives a total of 21 microoperations.
2. The CD (Conditional for branching) field selects status bit conditions.
3. The BR (Branch field) field specifies the type of branch to be used.
4. The AD (Address field) field contains a branch address. The address field is seven bits wide, since the control memory has 128= 2⁷ words.

Symbolic Microinstruction

Each line of the assembly language microprogram defines a symbolic microinstruction. Each symbolic microinstruction is divided into five fields: label, microoperations, CD, BR, and AD. The fields are specified in the table given below.

1	Label	The label field may be empty or it may specify a symbolic address. A label is terminated with a colon (:).
2	Microoperations	It consists of one, two, or three symbols, separated by commas. There may be no more than one symbol from each F field. The NOP symbol is used when the microinstruction has no microoperations. This will be translated by the assembler to nine zeros.
3	CD	The CD field has one of the letters U, I, S, or Z.
4	BR	The BR field contains one of the four symbols.
5	AD	The AD field specifies a value for the address field of the microinstruction in one of three possible ways: 1. With a symbolic address, this must also appear as a label. 2. With the symbol NEXT to designate the next address in sequence. 3. When the BR field contains a RET or MAP symbol, the AD field is left empty and is converted to seven zeros by the assembler.

The Fetch Routine

The control memory has 128 words, and each word contains 20 bits. To micro-program the control memory, it is necessary to determine the bit value of each of the 128 words. The first 64 words (addresses 0 to 63) are to be occupied by the routines for the 16 instructions.

The last 64 words may be used for any other purpose. A convenient starting location for the fetch routine is address 64. The microinstructions needed for the fetch routine are:

AR ← PC
DR ← M[AR]
PC ← PC + 1
AR ← DR(1-10)
CAR(2-5) ← DR(11-14)
CAR(0,1,6) ← 0

Symbolic Microprogram

A symbolic microprogram can be translated into its binary equivalent by means of an assembler. Each line of the assembly language microprogram defines a symbolic microinstruction. The execution of the third (MAP) microinstruction in the fetch routine results in a branch to address 0xxxx00, where xxxx are the four bits of operation code.

(– means no value in column/row)

Label	Microoperations	CD	BR	AD
ADD:	ORG0 NOP READ ADD ORG4	— I U U —	— CALL JMP JMP —	— INDRCT NEXT FETCH —
BRANCH OVER	NOP NOP NOP ARTCP ORG8	S U I U —	JMP JMP CALL JMP —	OVER FETCH INDRCT FETCH —
STORE:	NOP ACTDR WRITE ORG12	I U U —	CALL JMP JMP —	INDRECT NEXT FETCH —
EXCHANGE:	NOP READ ACTDR, DRTAC WRITE ORG64	I U U U —	CALL JMP JMP JMP —	INDRECT NEXT NEXT FETCH —
FETCH: INDRCT:	PCTAR READ, INCPC DRTAR READ DRTAR	U U U U U	JMP JMP MAP JMP RET	NEXT NEXT — NEXT —

Binary Microprogram

The symbolic microprogram is a convenient form for writing microprograms in a way that people can read and understand. But this is not the way that the microprogram is stored in memory. The symbolic microprogram must be translated to binary either by means of an assembler program or by the user if the microprogram is simple enough.

Binary Microinstruction = F1, F2, F3, CD, BR, AD

Micro Routine	Address Decimal	Address Binary	F1	F2	F3	CD	BR	AD
ADD	0 1 2 3	0000000 0000001 0000010 0000011	000 000 001 000	000 100 000 000	000 000 000 000	01 00 00 00	01 00 00 00	1000011 0000010 1000000 1000000
BRANCH	4 5 6 7 8 9 10 11	0000100 0000101 0000110 0000111 0001000 0001001 0001010 0001011	000 000 000 000 000 000 111 000	000 000 000 000 000 101 000 000	000 000 000 110 000 000 000 000	10 00 01 00 01 00 00 00	00 00 01 00 01 00 00 00	0000110 1000000 1000011 1000000 1000011 0001010 1000000 1000000
EXCHANGE	12 13 14 15	0001100 0001101 0001110 0001111	000 001 100 111	000 000 101 000	000 000 000 000	01 000 00 00	01 00 00 00	1000011 0001110 0001111 1000000
FETCH	64 65 66	1000000 1000001 1000010	110 000 101	000 100 000	000 101 000	00 00 00	00 00 11	1000001 1000010 0000000
INDRT	67 68	1000011 1000100	000 101	100 000	000 000	00 00	00 10	1000100 0000000