8085 Microprocessor Instructions and Their Classifications

8085 Microprocessor Instructions – In the 8085 microprocessor instruction set, there are a total of 246 instructions to perform 74 different operations (opcodes). The whole instruction set can be classified into different categories based on three different criteria:

1. Operation performed by the instruction
2. Length of the instruction
3. Addressing mode of the instruction

Operation performed by the Instruction

The instructions provided by the 8085 microprocessor can be categorized into five different groups based on the nature of the operations of the instructions. These groups are as follows:

1. Data Transfer (Move/Copy) Instructions
2. Arithmetic Instructions
3. Logical Instructions
4. Branch Instructions
5. Machine or Processor Control Instructions

Data Transfer (Move/Copy) Instructions

This group of instructions copies data from the source location to the destination location without changing the contents of the source. The data transfer instructions copy give data into a register, copy data from a register to a register, copy data from a register to memory or an input/output location, and vice versa. In data transfer instructions, the source can be data, or the contents of a register, or the contents of a memory location, or the contents from an input device, whereas the destination can be a register or memory, or an output device location. These instructions do not affect the flag register of the microprocessor.

The examples of data transfer instructions are as follows:

Instruction	Operation	Comments
MOV B, C	B ← C	Copy data from the source register C to destination register B.
MVI A, 30H	A ← 30H	Copy the data 30H to the accumulator register (A)
IN 01H	A ← [01H]	Accept (read) a data byte from the input device whose address is 01H and place it in the accumulator.
MOV D, M	D ← M	Copy data from memory location to the destination register D4.4.1.2 Arithmetic Instructions

Arithmetic Instructions

The 8085 microprocessor instructions can perform only four arithmetic operations.

Addition: Any 8-bit number, or the contents of a register, or the contents of a memory location can be added to the contents of the accumulator, and the result is stored in the accumulator. If there is any carry in result, it will be stored in the carry flag. The contents of two registers except the accumulator can not be added directly. One of the operands must be in the accumulator. It means, for example, the contents of register B and register C can not be added directly. To add these, one of the register contents must be copied to the accumulator first.

An example of addition instructions is given below:

Instruction	Operation	Comments
A DD B	A ← A + B	Add the contents of B to the contents of the accumulator (A), and the sum is stored in the accumulator.
ADI 51H	A ← A + 51H	Add the immediate data 51H to the contents of the accumulator.
ADD M	A ← A + M	Add the contents of memory locations to the contents of the accumulator.

Subtraction: Any 8-bit number, or the contents of a register, or the contents of a memory location can be subtracted from the contents of the accumulator. The result is always stored in the accumulator. If the contents of the accumulator are smaller than the other operand, then borrow is taken, and the carry flag will be set. The subtraction is performed in 2’s complement. No two other registers can be subtracted directly.

Examples of subtraction arithmetic instructions are as follows:

Instruction	Operation	Comments
SUB B	A ← A – B	Subtract the contents of register B from the contents of the accumulator (A)
SUI 51H	A ← A – 51H	Subtract the immediate data 51H from the contents of the accumulator (A)
SUB M	A ← A – M	Subtract the contents of the memory location from the contents of the accumulator (A)

Increment/Decrement: The 8085 microprocessor has the increment and decrement instructions to increase and decrease the contents of any register, memory location, or register pair by 1. Examples of such instructions are given below:

Instruction	Operation	Comments
INR E	E ← E – 01H	Increment the contents of register E.
DCR M	M ← M – 01H	Decrement the contents of the memory location.
INX B	BC ← BC + 01H	Increment the contents of the BC register pair.

Logical Instructions

The logical instructions provided by the 8085 microprocessor perform various logical rotate, compare, and complement operations with the contents of the accumulator.

Logical: Using these instructions, any 8-bit number, or the contents of a register, or the contents of a memory location can perform logical operations with the accumulator contents. These logical operations can be ANDing, ORing, or EX-ORing. The result is stored in the accumulator. The operation performed by the logical instruction also affects the flags according to their definitions.

Example

Instruction	Operation	Comments
ANA B	A ← A AND B	Logically AND the contents of register B with the contents of the accumulator and store the result in the accumulator.
ANI 7AH	A ← A AND 7AH	Logically AND the immediate data 7AH with the contents of the accumulator and store the result in the accumulator.
XRA A	A ← A Ex OR A	Logically, EX-OR the contents of the accumulator with itself.

Rotate: These instructions allow each bit in the accumulator to shift either left or right to the next position. Rotation instruction may include the carry flag in shifting the position.

Example

Instruction: RLC

Operation:

Comments: Rotate the accumulator left without carry: Rotate each bit in the accumulator to the left position without including the carry flag.

Instruction: RAR

Operation

Comments: Rotate Accumulator Right: Rotate each bit in the accumulator to the right position, including the carry flag.

Compare: The compare instructions compare two operands and affect the status flags (CY and Z) values depending on the result of the comparison. Any 8-bit number, or the contents of a register, or a memory location can be compared for equality, greater than, or less than with the contents of the accumulator. The compare instructions actually compute the value of the accumulator contents minus the other operand. The original values of the operands are not changed. The result is stored in a register that is not accessible to the programmer. Based on the results, flags are affected.

Example

Instruction	Operation	Comments
CMP B	A compared with B (A-B)	Compare the contents of the register with the contents of the accumulator for less than, equal to, or more than.
CPI 3BH	A comparison with 3BH (A-3BH)	Compare the immediate data 3BH with the contents of the accumulator for less than, equal to, or more than.

Complement: Complement instruction performs 1’s complement operation on the contents of the accumulator, and the result is stored back in the accumulator. Only accumulator contents can be complemented by the complement instruction. Flags are not affected by this instruction.

Example

Instruction	Operation	Comments
CMA	A ← A	Complement the contents of the accumulator.

Branch Instructions

Generally, the program is executed sequentially, one instruction after another, but in some cases, the execution sequence of the program has to change. The branch instructions allow the 8085 microprocessor to change the sequence of the program, either unconditionally or under certain test conditions. These instructions specify the microprocessor to go to the different memory location and start execution from there. In the 8085 microprocessor instruction set, three types of branch instructions are used.

1. Jump Instruction
2. Call and Return instructions
3. Restart Instructions

All these types of instruction can be further divided into two types: Conditional and Unconditional.

Jump Instructions: The conditional jump instructions of 8085 perform a jump based on the status of the carry flag, zero flag, parity flag, or sign flag. There is no jump instruction based on the status of the auxiliary flag. A change in program flow is needed when a sequence of instructions is to be executed repeatedly. In such a case, an unconditional jump instruction plays an important role in transferring the execution from the end of the program to the start of the program. The unconditional jump instructions do not check any flag.

The program sequence is changed by copying the new address to the program counter (PC) register. Hence, the microprocessor executes the instruction from a new address in the program counter.

Example

Instruction	Operation	Comments
JMP 3000H	PC ← 3000H	Change the program sequence to the location 3000H by copying the address in the program counter (unconditional)
PCHL	PC ← HL	Change the program sequence to the location specified by HL register pair (unconditional).
JC 5010H	If CY = 1 PC ← 5010H else PC ← PC + 1	Change the program sequence to the location 5010H if the carry flag is set (1), else follow the same sequence (conditional).
JNZ 3100H	If Z = 0 PC ← 3100H else PC ← PC + 1	Change the program sequence to the location 3100H if the zero flag is reset (0), else follow the same sequence (conditional).

Call and Return Instructions: In most of the programs, a particular sequence of instructions has to be used at several places. Writing the same sequence of instructions at these various places can be avoided by writing these instructions separately and making a call whenever they are required. Such separately written instructions are known as a subroutine or a procedure. Whenever the instructions in a subroutine are required to be executed, the execution is transferred to the subroutine using a call instruction. After executing the subroutine instructions, the sequence of the program returns to the main program by using return instructions.

Example

Instruction	Operation	Comments
CALL 5000H	Stack ← PC PC ← 5000H	Store the address of the next instruction in the main program on the stack and change the program sequence to the location 5000H by copying the address in the program counter (unconditional).
CPO 3000H		If parity is odd, store the address of the next instruction in the main program on the stack, change the program sequence to the location 3000H, else follow the same sequence (conditional).
RET	PC ← Stack	Return to the main program after completing the subroutine program by copying the top of the stack contents (16 bits) to the program counter (unconditional).
RNC	If CY = 0 PC ← Stack else PC ← PC + 1	If the carry flag is reset (0), return to the main program; else, continue the execution of the subroutine (conditional).

Note: Call instructions can be visualized as pushing the program counter (PC) contents on the stack and then jumping to the subroutine.

Restart Instructions: The restart instructions are equivalent to call instructions, with the difference that the address of the subroutine is predefined in the case of restart instructions. These instructions are generally used in conjunction with interrupts and inserted using external hardware. No flag is affected by these instructions.

Example

Instruction	Operation	Comments
RST 0	Stack ← PC PC ← 0000H	Store the address of the next instruction in the main program on the stack and change the program sequence to the predefined location 0000H. by copying this address into the program counter.
RST 5	Stack ← PC PC ← 0028H	Store the address of the next instruction in the main program on the stack and change the program sequence to the predefined location 0028H by copying this address into the program counter.

Machine or Processor Control Instructions

These instructions control the functioning of the available hardware used in the processor, like to control the bus usage, stopping the program execution, etc. Examples of such instructions are HLT (Halt or stop the execution of the program) and NOP (No operation is performed).

Length of the Instruction

Length of the instruction is shown in the term byte. The 8085 microprocessor can process 8 bits or 1 byte of data simultaneously. The word size of the 8085 microprocessor is 1 byte. According to the length of the instruction, the 8085 microprocessor has three types of instructions.

1. One byte or single word instructions
2. Two-byte or double-word instructions
3. Three bytes of triple-word instructions

The first byte of the instruction is always the opcode; in two-byte instructions, the second byte is usually data; in three-byte instructions, the last two bytes represent address or 16-bit data.

One Byte Instructions: One-byte instructions include the opcode and operand in the same byte. All those instructions which are having no immediate data or direct address are one-byte instructions.

Example

Instruction Opcode	Instruction Operand	Hex Code	Byte	Comments
MOV	B, A	47	First	Copy the contents of the accumulator to register B.
ANA	B	A0	First	Logically AND the contents of the accumulator with the contents of register B.
CMA		2F	First	Complement (1’s) each bit in the accumulator.

In this type of instruction, only the opcode byte is there, and no operand byte. These instructions are stored in 8-bit binary format in memory; each requires a memory location of 1 byte.

Two-Byte Instructions: These types of instructions require two adjacent memory locations to store in memory. The first byte specifies the operation code, and the second byte specifies the operand. All those instructions which are having immediate data or an 8-bit address (in peripheral-mapped input/output) come under this type of instruction. These instructions are generally represented by three letters with the ending letter I. There are also some exceptions, like IN, OUT, etc, instructions.

Example

Instruction Opcode	Instruction Opcode	Hex Code	Byte	Comments
MVI	A, 8AH	3E 8A	First Second	Load the immediate data 8AH into the accumulator.
ANI	76H	E6 76	First Second	Logical AND the contents of the accumulator with immediate data 76H.
ADI	33H	C6 33	First Second	Add the immediate data 33H to the contents of the accumulator.

To store the two-byte instructions, the lower memory location is used for the opcode, and the higher memory location is used for the operand.

Three-byte instructions: Three-byte instructions require three adjacent memory locations to store in memory. The first byte specifies the operation code, and the remaining two bytes specify the 16-bit data/address.

Example

Instruction Opcode	Instruction Operand	Hex Code	Byte	Comments
LXI	B, 3050H	01 50 30	First Second Third	Load the immediate 16-bit data/address 3050H to the BC register pair.
STA	7000H	32 00 70	First Second Third	Store the contents of the accumulator at the location 7000H.

Note: The second byte is the low-order data/address, and the third byte is the high-order data/address.

Addressing Mode of Instruction

The programmer can refer to the stored data in different ways. The different ways that a microprocessor can access data are referred to as addressing modes. In the 8085 microprocessor assembly language instruction set, five types of addressing modes are defined. These are:

1. Immediate Addressing Mode Instruction
2. Register Addressing Mode Instruction
3. Implicit Addressing Mode Instruction
4. Direct Addressing Mode Instruction
5. Indirect Addressing Mode Instruction

In the first three addressing mode instructions, data is specified, whereas in the last two addressing mode instructions, the address of the data is specified.

Immediate Addressing Mode Instruction: In an immediate addressing mode instruction, immediate data (Hex or Binary) of 8-bit or 16-bit is specified as a part of the instruction. The immediate data is operated with a register or register pair according to the instruction. The operation can be any of the data transfer, arithmetic, logical, etc. In the 8085 Microprocessor, the instructions having ‘I’ letter as the last alphabet of the opcode fall under this category. The letter ‘I’ indicates the immediate addressing mode.

Example

Instruction Opcode	Instruction Operand	Hex Code	Comments
MVI	A, 30H	3E 30	Copy the immediate data 30H to the accumulator register.
SUI	51H	D6 51	Subtract the immediate data 51H from the contents of the accumulator.
ANI	7AH	E6 7A	Logically AND the immediate data 7AH with the contents of the accumulator and store the result in the accumulator.

Register Addressing Mode Instruction: The register addressing mode specifies that the source operand, destination operand, or both the operands are stored in a register or register pair (according to the length of data). The name of the register or register pair is shown in the instruction. The register addressing mode instructions are faster in execution because there is no need to access memory for operands. In such instruction, the name of the register is actually the address of the data to be operated.

Example

Instruction Opcode	Instruction Operand	Hex Code	Comments
MOV	B, C	41	Copy the data from the source register C to the destination register B.
ADD	B	80	Add the contents of register B to the contents of the accumulator, and the sum is stored in the accumulator.
XRA	A	AF	Logically Ex-OR the contents of the accumulator with itself.

Note: Register addressing mode instructions do not have any immediate data. Therefore, only the opcode byte is there, and the length of the instruction is always 1 byte.

Implicit Addressing Mode Instruction: In the implicit addressing mode instructions, the opcode itself specifies the address of the operands. This is also known as the implied addressing mode. Since there is no operand in this byte of instructions, the length of the instruction is always 1 byte.

Example

Instruction Opcode	Instruction Operand	Hex Code	Comments
CMA		2F	Complement (1’s) the contents of the accumulator.
RAR		1F	Rotate Accumulator Right: Rotate each bit in the accumulator to the right position, including the carry flag.
XCHG		EB	Exchange H and L with D and E.

Direct Addressing Mode Instruction: In direct addressing mode instructions, the address of the data is directly given in the instruction itself using its hex representation. If a 16-bit address (memory-mapped input/output) is used, the second and third bytes of the instruction contain this 16-bit address. If an 8-bit address (peripheral-mapped input/output) is used, the second byte is the 8-bit port address. The length of these instructions is always 3 bytes, excluding the IN and OUT instructions, where a port address of 1 byte is used. In these two cases, the length of instructions is 2 bytes.

Instruction Opcode	Instruction Operand	Hex Code	Comments
STA	3000H	32 00 30	Store the contents of the accumulator to the given memory location 3000H.
SHLD	2000H	22 00 20	Store the HL register pair into two consecutive memory locations. Lower byte, i.e., the contents of L register into memory location 2000H, and higher byte, i.e., the contents of H register into memory location 2001H.
1N	02	DB 02	Copy the data available at port address 02H to the accumulator.

Indirect Addressing Mode Instruction: If the address of the data is stored in a register pair and the name of that register pair is shown in the instruction, then the instruction has indirect addressing mode. Whenever the alphabet ‘M’ is used as a source/destination memory location, the address of that memory is found from the HL register pair.

Example

Instruction Opcode	Instruction Operand	Hex Code	Comments
STAX	B	02	Store the contents of the accumulator at the location specified by the BC register pair.
MOV	A, M	7E	Copy the contents of the memory location specified by the HL register pair to the accumulator.
CMP	M	BE	Compare the contents of the memory location specified by the HL register pair to the accumulator for less than, equal to, or more than.

In this type of instruction, there is no immediate data; the length of the instruction is always one byte.