8279 Keyboard/Display Controller YASH PAL, April 20, 2026April 20, 2026 8279 Keyboard/Display Controller – The 8279 is a hardware approach to interface a matrix keyboard and multiplexed display. A software approach is also possible to interface the keyboard and the display unit. The disadvantage of the software approach is that the microprocessor is occupied for a considerable amount of time in checking the keyboard and refreshing the display.The 8279 is a 40-pin device (as shown in Figure 1 & Figure 2) with two major segments: Keyboard and display. The keyboard segment can be connected to a 64-contact key matrix. A maximum of 8 keyboard entries (codes) can be stored in the FIFO (First In First Out) RAM. Every time a key is pressed, an interrupt signal is generated to request the microprocessor to read the key code. The display segment can provide a 16-character scanned display interface with such devices as LEDS. This segment has 16 x 8 R/W memory (RAM), which can be used to read/write information for display purposes. The display can be set in either right-entry or left-entry format.Figure 1: Pin Configuration of 8279Figure 2: Pin diagram of 8279Block Diagram of 8279The block diagram is shown in Figure 3. It can be divided into four major sections: Keyboard section, Scan section, Display section, and Processor section.Figure 3: Block diagram of 8279Keyboard SectionThe function of various pins of this section is:RL0 – RL7 (Return Lines): These lines are connected to eight columns of a keyboard.SHIFT: It is used in the scanned keyboard. On key closure or when the key is closed, the shift input status is stored.CNTL/STB (Control/Strobe): The status of the SHIFT key and the control key can be stored along with a key closure. The keys are automatically debounced, and the keyboard can operate in two modes:Two-key lockout mode: In the two-key lockout mode, if two keys are pressed simultaneously, only the first key is recognized.N-key rollover mode: In the N-key rollover mode, simultaneous keys are recognized, and their codes are stored in the internal buffer; it can also be set up so that no key is recognized until only one key remains pressed.Scan SectionThe scan section has a scan counter and four scan lines (SL0 – SL3). These four scan lines can be decoded using a 4-to-16 decoder to generate 16 lines for scanning. These lines can be connected to the rows of a matrix keyboard and the digit drivers of a multiplexed display.Display SectionThe display section has eight output lines divided into two groups, A0 – A3 and B0 – B3. These lines can be used, either as a group of eight lines or as two groups of four, in combination with the scan lines for a multiplexed display. The display can be blanked by using the BD line. This section includes 16 x 8 display RAMProcessor SectionThe function of various pins of this section is:DB0 – DB7: These are bidirectional data bus lines, used to transmit the commands.IRQ: It is an active high signal. It goes high whenever data entries are stored in FIFO RAM. This signal is used to interrupt the microprocessor to indicate the availability of data.A0: When A0 is high, signals are interpreted as control words or status. When A0 goes low, signals are interpreted as data.CS (Chip Select): It is an active low signal and is used to enable the chip.RD (Read): It is an active low signal and used to read the input.WR (Write): It is an active low signal and used to write the input.CLK (Clock): It is used to generate internal timing.RESET: It is an active high signal and is used to reset the 8279.8279 Command Words8279 provides 8 commands that are sent on the data bus with CS low and A0 high.Keyboard/Display mode set commandThis command is used to set various operating modes of the keyboard and display section. The format for this command is shown in Figure 4.Figure 4: keyboard/display mode set commandDisplay mode008-digit, 8-bit character display – left entry0116-digit, 8-bit character display – left entry108-digit, 8-bit character display – right entry1116-digit, 8-bit character display – right entryTable for Display Mode of 8279Keyboard Mode000Encoded scan keyboard – 2 key lockout001Decoded scan keyboard – 2 key lockout010Encoded scan keyboard – N Key rollover011Decoded scan keyboard – N Key rollover100Encoded sensor matrix101Decoded sensor matrix110Strobe input, encoded display scan111Strobe input, decoded display scanTable for Keyboard mode of 8279Program Clock CommandIt is used to set the internal clock frequency. PPPPP bits of a command word vary from 2 to 3110, specifying the internal divisor. This is shown in Figure 5.Figure 5: Program clock diagram of 8279Read FIFO/Sensor RAM CommandTo read FIFO/Sensor RAM, 8279 is set by this command.Auto increment flag AI and RAM address bits AAA are not required in scan keyboard mode.In sensor matrix mode, AAA selects one of the 8 rows of RAM, and each successive read from the subsequent row is done by setting AI = 1.Figure 6: Read FIFO Sensor RAM CommandRead Display RAM CommandThis command is used to read data from display RAM. If AI is set to 1 then row address will be incremented after each read.Figure 7: Read Display RAM CommandWrite Display RAM CommandThis command is used to write a character into the display RAM. The bit AAAA specifies the address of a 16-byte display RAM location to be accessed. Auto increment functions are the same to read display RAM.Figure 8: Write Display RAM CommandDisplay Inhibit/Blanking CommandThis command is used to inhibit or blank the display. IW bits are used to mask nibbles. When IW = 1, the port is masked.Figure 9: Display Inhibit blanking commandInhibit nibble A0Normal operation1Inhibit nibble A displayInhibit nibble B0Normal operation1Inhibit nibble B displayBlank nibble A0Normal operation1Inhibit nibble A displayBlank nibble B0Normal operation1Inhibit nibble B displayClear CommandThis command is used to set the clear or blanking code of the display and clear the status register.(a) CD bits (CD0 – CD1) are used to select blanking code as given belowCD1CD0Blanking Code0XAll zeros (for common cathode displays)1020H (for alphanumeric displays)11All ones (for common Anode display)Bit CD2, when set to one, enables a clear display.(b) If CF = 1, FIFO is cleared, and it resets the interrupt line.(c) CA clears all the bits.Figure 10: Clear CommandEnd Interrupt/Error Mode Set CommandThis command disables the IRQ signal and enables further writing into RAM. For N-key rollover mode, if E = 1, the error special mode is operated.Figure 11: End Interrupt/Error Mode Set Command engineering subjects Microprocessor microprocessor