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Addressing Modes of 8086 Microprocessor

YASH PAL, April 9, 2026April 30, 2026

Addressing Modes of the 8086 Microprocessor – In the 8086 Microprocessor, the way in which the operands are specified in the instruction is called the address mode. Each microprocessor has its own instruction set and has different ways to specify the operands/address mode. The following are the 6 addressing modes used by the 8086 microprocessor.

Table of Contents

  • Addressing Modes of the 8086 Microprocessor
    • Register Addressing Mode
    • Immediate Addressing Mode
    • Direct Addressing Mode
    • Indirect Addressing Mode
    • Implicit Addressing Mode
    • Segment Addressing Mode

Addressing Modes of the 8086 Microprocessor

  1. Register Addressing Mode
  2. Immediate Addressing Mode
  3. Direct Addressing Mode
  4. Indirect Addressing Mode
  5. Implicit Addressing Mode
  6. Segment Addressing Mode

Register Addressing Mode

In this addressing mode, both operands are stored in registers, and the names of the registers are specified in the instruction. For example

MOV  AX, BX    ;   AX ← BX
MOV  BH, CL    ;   BH ← CL

Immediate Addressing Mode

In this, the immediate date is a part of the instruction and appears in the form of successive byte or bytes. For example

MOV  AX, 203AH  ; AX ← 203AH
MOV  BL, ABH    ; BL ← ABH

Direct Addressing Mode

In this mode, the data is accessed by its address, and the address (offset address) is directly specified in the instruction.

MOV  AX, [2000H]    ; AX ← [DS : 2000H]
ADD  CL, [3060H]    ; CL ← CL + [DS : 3060H]

Indirect Addressing Mode

In this mode, the address of data is stored in some register or in a pair of registers. According to the choice of registers, indirect addressing has different categories:

Register Indirect: In this mode, the memory offset address can be specified by any of the following four registers: two base registers (BX and BP) and two index registers (SI and DI)

MOV  AX, [BX]      ; AX ← [DS : BX]
MOV  DX, [SI]      ; DX ← [DS : SI]

Index Indirect: In this mode, the memory offset address is specified by any of two index registers (SI and DI) with an 8-bit or 16-bit displacement.

MOV  CL, [SI + 03H]     ; CL ← [DS : SI + 03H]
MOV  AX, [DI + 0012H]   ; AX ← [DS : DI + 0012H]

Base Indirect: This is similar to the index indirect mode, but the memory offset address is specified by any of two base registers (BX and BP) with an 8-bit or 16-bit displacement, and the base address is given by SS instead of DS.

MOV  DL, [BP - 02H]     ; DL ← [SS : BP - 02H]
ADD  CL, [BX + 0030H]   ; CL ← CL + [SS : BX + 0030H]

Based and Indexed Indirect: In this mode, a pair of base (BX/BP) and index (SI/DI) is used to specify the address.

MOV  AX, [BP + SI]      ; AX ← [SS : BP + SI]
SUB  BX, [BX + DI]      ; BX ← BX - [SS : BX + DI]

Based and Indexed with Displacement: This is the most flexible mode. In this mode, a pair of base (BX/BP) and index (SI/DI) is used to specify the address with an 8-bit or 16-bit displacement.

MOV  AX, [BP + SI + 02H]  ; AX ← [SS : BP + SI + 02H]
SUB  BX, [BX + DI + 0012H]; BX ← BX - [SS : BX + DI + 0012H]

Implicit Addressing Mode

In this mode, the operand is implicit and is defined within the opcode. All the string instructions come under this mode. Examples of this mode are

MOV  SB         ; [ES : DI] ← [DS : SI]
LOD  SB         ; AL ← [DS : SI]

Segment Addressing Mode

This addressing is also known as a branch-related addressing mode. In this mode, the address is specified in the instruction where the program control is transferred. If the location to which the control is to be transferred lies in a different segment other than the current one, the mode is called inter-segment addressing mode. If the location is in the same segment, the mode is called intra intra-segment addressing mode.

Intersegment Direct: In this mode, the destination location lies in a different segment, and the address appears directly in the instruction as an immediate displacement value. The displacement is computed relative to the contents of the instruction pointer (IP). Examples are as follows:

JMP  DELAY    ; DELAY is subroutine in other segment.
CALL PROG     ; PROG is defined in other segment.

Intersegment Indirect: In this mode, the destination address is in a different segment, and it is passed to the instruction indirectly.

JMP   DWORD    PTR[SI]
CALL  DWORD    PTR[BX]

Intersegment Direct: In this mode, the destination address is in the same segment and appears directly in the instruction as an immediate displacement value.

JAE     305AH
CALL   706FH

Intersegment Indirect: In this, the destination address is in the same segment, and it is passed to the instruction indirectly.

CALL   BX
JMP    WORD    PTR[SI]

Microprocessor Subject Tutorials & Notes | Beginners Guide
engineering subjects Microprocessor microprocessor

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Microprocessor as CPU
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Pin Configuration of 8085 Microprocessor
Demultiplexing of Address and Data Bus in 8085 Microprocessor
Basic Operations of the 8085 Microprocessor
Memory Organization in 8085 Microprocessor

Microprocessor memory structure
Memory Interfacing with 8085 Microprocessor
Memory address decoding in a microprocessor
Input/Output Interfacing in Microprocessor

8085 Microprocessor Programming Model
8085 Assembly Language Programming
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Microprocessor Programming Steps
Flowchart Design of a Program
8085 Microprocessor Data Transfer Instructions
8085 Microprocessor Arithmetic Instructions
8085 Microprocessor Logical Instructions
8085 Microprocessor Branch Instructions
8085 Microprocessor Machine-Processor Control Instructions
Basic Structure of an Assembly Language Program
Programming Techniques for Repeated Tasks
Debugging of a Microprocessor Program

8085 Microprocessor Timing Operations
Timing Diagram of 8085 Microprocessor
Time Delay in Microprocessor
Stack in 8085 Microprocessor
Subroutine in 8085 Microprocessor
MACRO in Microprocessor

Interrupts in 8085 Microprocessor
Digital to Analog Converter (DAC) in Microprocessor
Analog to Digital Converter (ADC) in Microprocessor

Programmable Peripheral Interface
8255 (PPI) Programmable Peripheral Interface
Programmable Interval Timer (PIT) 8253/8254
Programmable Interrupt Controller (PIC) 8259
Direct Memory Access (DMA) Controller 8257

8086 Microprocessor Architecture, Instructions, and Pin Diagram
Addressing Modes of the 8086 Microprocessor
Instruction Set of 8086 Microprocessor
8088 Microprocessor Architecture with Pin Diagram
Difference between 8085, 8086, and 8088 Microprocessors
80186 Microprocessor Architecture
80286 Microprocessor Architecture & Features
80386 Microprocessor Architecture & Features
80486 Microprocessor Architecture & Features
80586 (Pentium) Microprocessor Architecture & Features

8051 Microcontroller Architecture
8051 Microcontroller Memory Organization
8051 Microcontroller Pin Configuration & Programming Model
8051 Microcontroller Timers and Counters
Serial Communication in 8051 Microcontroller
Interrupts of the 8051 Microcontroller
Addressing Modes of the 8051 Microcontroller
Intel MMX Architecture
Dual Core Processor

LED & Multiplexed Display Interfacing with Microprocessor
Liquid Crystal Display (LCD) Pin Configuration & Interfacing
Matrix Keyboard Interfacing with Microprocessor
8279 Keyboard/Display Controller
Programmable Communication Interface (USART) 8251
Serial Communication Standards in Microprocessor
Computer System Standard Buses

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