Interrupts of 8051 Microcontroller

YASH PAL,

Interrupts of the 8051 Microcontroller – The 8051 microcontroller has five interrupts. Out of five interrupts, three (Timer flag 0, Timer flag 1, and serial port interrupt RI or TI) are generated internally by internal operations, and the remaining two (INT0 and INT1) are triggered by external circuitry, which are connected to port pins P3.2 and P3.3.

The programmer can control all functions of the interrupt. The programmer is able to alter control bits in the Interrupt Enable (IE) register, the Interrupt Priority (IP) register, and the Timer Control (TCON) register. The programmer can allow or block, all or any combination of the interrupts by setting or resetting the bits of these registers. The Interrupt Enable (IE) register is used to enable and disable a specific interrupt. The IE special function register is shown in the figure below. Bit D7 of the IE register is used to enable or disable all interrupts.

The Interrupt Enable (IE) Special Function Register

Power Mode Control (PCON) Register
Power Mode Control (PCON) Register
BitSymbolFunction
7EAEnable the interrupt bit. Cleared to 0 by the program to disable all interrupts; set to 1 to permit individual interrupts to be enabled by their enable bits.
6–Not implemented.
5ET2Reserved for future use.
4ESEnable serial port interrupt. Set to 1 by the program to enable the serial port interrupt; cleared to 0 to disable the serial port interrupt.
3ET1Enable timer 1 overflow interrupt. Set to 1 by the program to enable timer 1 overflow interrupt; cleared to 0 to disable timer 1 overflow interrupt.
2EX1Enable external interrupt 1. Set to 1 by the program to enable INT1 interrupt; cleared to 0 to disable INT1 interrupt.
1ET0Enable timer 0 overflow interrupt. Set to 1 by the program to enable timer 0 overflow interrupt; cleared to 0 to disable timer 0 overflow interrupt.
0EX0Enable external interrupt 0. Set to 1 by the program to enable the INT0 interrupt; cleared to 0 to disable the INT0 interrupt. Bit addressable as IE.0 to IE.7.
Interrupt enable (IE) register

The Interrupt Priority (IP) register is a special function register that is used to specify the relative priority of each interrupt. In the 8051 microcontroller, an interrupt may be either of low (0) priority or high (1) priority. An interrupt may only interrupt a low priority. The Interrupt Priority (IP) register is shown in the figure below.

The interrupt priority IP special function register
Interrupt Priority (IP) special function register
BitSymbolFunction
7–Not implemented.
6–Not implemented.
5PT2Reserved for future use.
4PSPriority of serial port interrupt. Set/cleared by program.
3PT1Priority of timer 1 overflow interrupt. Set/cleared by program.
2PX1Priority of external interrupt 1. Set/cleared by program.
1PT0Priority of timer 0 overflow interrupt. Set/cleared by program.
0PX0Priority of external interrupt 0. Set/cleared by program.
The Interrupt Priority (IP) register

Note: Priority may be 1 (highest) or 0 (lowest), bit-addressable as IP.0 to IP.7.

engineering subjects Microprocessor